x86 Microprocessor
The following issues should be noted when using an x86 kernel:
The x86 kernel does not restrict your use of registers.
In addition, you can use C code as well as assembler code when developing your interrupt service routines (ISRs). However, be aware that the ISR should be as small and fast as possible.
Nested interrupts.
The x86 CPU architecture contains a single interrupt line and typically a PIC to support nested interrupts. To support nesting by priority, the PIC must be programmed accordingly. For more information, see the PIC documentation. When the x86 kernel intercepts an interrupt request (IRQ), the kernel disables interrupts, saves the registers, and then turns interrupts back on before calling the ISR.
When using GetSystemInfo to obtain microprocessor information, note that the dwProcessorType member of the SYSTEM_INFO structure does not return the correct microprocessor type.
To have dwProcessorType return the correct microprocessor type, implement an I/O control code in your OAL before any other applications are run and set the CEProcessorType global variable to PROCESSOR_INTEL_486. This value cannot be set in OEMInit because the detect routine for the OS is not run until after OEMInit is called.
See Also
How to Develop an OEM Adaptation Layer | Microprocessor-specific Issues
Last updated on Wednesday, April 13, 2005
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