IntrMask

This global variable array provides the MIPS and SHx kernel with information about which nested interrupts are masked while the current interrupt is being handled.

USHORT intrMask;

Parameters

None.

Return Values

A value of one indicates the interrupt at that bit is masked. The value is negated and shifted before programming the status register.

Remarks

MIPS Kernel

Because there is not a hard-coded priority scheme in MIPS architecture, the kernel utilizes two structures that provide information about nested interrupts. These structures, IntrPriority and IntrMask, provide the kernel with information about which interrupts are masked while the current interrupt is being handled. The IntrPriority table determines, for any given combination of simultaneously pending interrupts, which interrupt is to be given the highest priority. The resulting interrupt is then serviced first. The IntrMask table defines how to set the interrupt mask while servicing that particular interrupt. Access to IntrMask is gained by declaring the IntrMask variable in the OAL.

IntrPriority contains one entry for each combination of bits in the 6-bit interrupt field. The entry defines which interrupt should be serviced. The value is the bit number multiplied by four. For example, if interrupts 1 and 3 are both pending, IntrPriority[0xA] = 1*4 would indicate that interrupt 1 should be serviced first. Multiplying the bit number by four is used to speed indexing into the IntrMask array in the kernel code.

The IntrMask table tells the kernel which interrupt mask to set in the CPU during the execution of the interrupt service routine. A one indicates the interrupt at that bit is masked (the value is negated and shifted before programming the status register).

The following code example shows how IntrMask is used.

// OEM Review : Disabled nested interrupts
IntrMask:
.byte   0x3f   // 00 0000   // for spurious interrupt
.byte   0x3f   // 00 0001
.byte   0x3f   // 00 0010
.byte   0x3f   // 00 0100
.byte   0x3f   // 00 1000
.byte   0x3f   // 01 0000
.byte   0x3f   // 10 0000
.byte   0x00   // padding

SHx Kernel

In the SHx architecture, the kernel utilizes the IntrPriority structure to provide the kernel with the information on which nested interrupts are masked when the current interrupt is being handled. Access to IntrPriority is gained by declaring the IntrPrio variable in the OAL.

IntrPrio represents an array of 112 possible interrupts. The interrupts are values from 0x200 to 0xfe0: interrupt 0x200 is equivalent to IntrPrio[0] and 0xfe0 is equivalent to IntrPrio[111]. In the current version of the SHx kernel only initializes nesting for the first 16 interrupts. The value in each array entry identifies which interrupts are to be disabled when the current interrupt is being handled.

The following table shows the defaults that support nested interrupts.

To disable nested interrupts, 0xF can be assigned to each array element according to the following code example.

// OEMREVIEW : This disables interrupt nesting
//
{
    extern BYTE IntrPrio[];
    int i;

    // for each INTEVT 0x200 - 0xfe0 (0=0x200, 1=0x220, etc)
    for (i = 0; i < 0x70; i++) {
        IntrPrio[i] = 0xF;  // Mask all interrupts
    }
}

The IntrPriority table must be modified in the OEMInit function before normal operations begin.

Requirements

OS Versions: Windows CE .NET 4.0 and later.
Header: Not applicable.

See Also

IntrPrio | OEMInit

Last updated on Wednesday, April 13, 2005

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