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SH3FQCR_Fast

This variable is a frequency control register that can be set to the values defined in Sh3.inc.

unsigned short SH3FQCR_Fast;

Remarks

The valid values for _SH3FQCR_Fast are shown in the following table.

Value Definition
CPG_FRQCR_CKOEN Clock enable
CPG_FRQCR_PLLEN PLL circuit 1 enable
CPG_FRQCR_PSTBY PLL 1 standby
CPG_FRQCR_STC PLL 1 frequency multiplication rate mask
CPG_FRQCR_STC_1 x1 PLL 1 frequency multiplication rate
CPG_FRQCR_STC_2 x2 PLL 1 frequency multiplication rate
CPG_FRQCR_STC_4 x4 PLL 1 frequency multiplication rate
CPG_FRQCR_IFC Internal clock frequency divider 1 rate mask
CPG_FRQCR_IFC_1 /1 Internal clock frequency divider 1 rate
CPG_FRQCR_IFC_2 /2 Internal clock frequency divider 1 rate
CPG_FRQCR_IFC_4 /4 Internal clock frequency divider 1 rate
CPG_FRQCR_PFC Peripheral clock frequency divider 2 rate mask
CPG_FRQCR_PFC_1 /1 Peripheral clock frequency divider 2 rate
CPG_FRQCR_PFC_2 /2 Peripheral clock frequency divider 2 rate
CPG_FRQCR_PFC_4 /4 Peripheral clock frequency divider 2 rate

By default, the SH3 implementation sets this variable to the following values:

  • CPG_FRQCR_CKOEN
  • CPG_FRQCR_PLLEN
  • CPG_FRQCR_PSTBY
  • CPG_FRQCR_STC_4
  • CPG_FRQCR_PFC_1

For more information about the SH3 microprocessor, see the SH3 Series Programming Manual.

The following code sample shows what value this variable is set to:

.section .text,code
.export _SH3FQCR_Fast
.align 4
_SH3FQCR_Fast:     .data.w    CPG_FRQCR_CLOCK
.data.w    0    ; pad for quad byte align

Requirements

OS Versions: Windows CE 2.10 and later.
Header: Not applicable.

See Also

Required OAL Variables

Last updated on Wednesday, April 13, 2005

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