IsProcessorFeaturePresent (Windows Embedded CE 6.0)

1/6/2010

This function retrieves information about supported features in a system.

Syntax

BOOL IsProcessorFeaturePresent(
  DWORD dwProcessorFeature
);

Parameters

• dwProcessorFeature
  [in] Specifies the flag for the feature that you want to verify support for.

  The following table shows the flags for ARM processor features.

  Flag	Description
  PF_ARM_CACHE_CAN_BE_LOCKED_DOWN	Cache can be locked down.
  PF_ARM_DSP	E DSP instructions. This flag is deprecated, but no additional flag is required because this is covered by ARMv5 and later.
  PF_ARM_DTCM	Tightly coupled data memory.
  PF_ARM_INTEL_PMU	Performance Monitor Unit (PMU).
  PF_ARM_INTEL_WMMX	WMMX support.
  PF_ARM_INTEL_XSCALE	Intel XScale processor. This can be used to determine if the processor supports operations where src==dest.
  PF_ARM_ITCM	Tightly coupled data memory.
  PF_ARM_JAZELLE	ARM Jazelle technology.
  PF_ARM_L2CACHE	Level 2 cache controller. This flag is deprecated. For the correct flags to use, see the other L2 cache flags.
  PF_ARM_L2CACHE_COPROC	Level 2 cache controller implemented as a coprocessor.
  PF_ARM_L2CACHE_MEMORY_MAPPED	Level 2 cache controller implemented as a memory-mapped peripheral.
  PF_ARM_MBX	ARM MBX technology.
  PF_ARM_MOVE_CP	ARM MOVE coprocessor.
  PF_ARM_MPU	Support for memory protection unit (MPU) is available.
  PF_ARM_NEON	NEON instruction set.
  PF_ARM_PHYSICALLY_TAGGED_CACHE	Cache is, or can be, physically tagged.
  PF_ARM_T2EE	T2EE instruction set.
  PF_ARM_THUMB	Thumb instruction set.
  PF_ARM_THUMB2	Thumb2 instruction set.
  PF_ARM_UNALIGNED_ACCESS	Can support unaligned access. You need to call a KLIB_IOCTL to turn this on.
  PF_ARM_UNIFIED_CACHE	Unified cache.
  PF_ARM_V4	ARM architecture v4.
  PF_ARM_V5	ARM architecture v5.
  PF_ARM_V6	ARM architecture v6.
  PF_ARM_V7	ARM architecture v7.
  PF_ARM_VFP_DOUBLE_PRECISION	Double precision vectored floating-point unit.
  PF_ARM_VFP_SINGLE_PRECISION	Single precision vectored floating-point unit.
  PF_ARM_VFP10	VFP10 floating-point unit (FPU) This flag is obsolete. For the correct flags to use, see the other VFP flags.
  PF_ARM_VFP3	VFP3 instruction set.
  PF_ARM_WRITE_BUFFER	Writeback buffer.
  PF_ARM_WRITE_BACK_CACHE	Writeback cache.

  The following table shows the flags for MIPS processor features.

  Flag	Description
  PF_MIPS_ARCH_2	Architecture release 2
  PF_MIPS_CPU_32FPR	32 double-precision FP registers
  PF_MIPS_CPU_4KEX	R4K exception model
  PF_MIPS_CPU_4KTLB	R4K translation look-aside buffer (TLB) handler
  PF_MIPS_CPU_CACHE_CDEX	Create_Dirty_Exclusive cache operation
  PF_MIPS_CPU_COUNTER	Cycle count or compare
  PF_MIPS_CPU_DIVEC	Dedicated interrupt vector
  PF_MIPS_CPU_EJTAG	EJTAG exception
  PF_MIPS_CPU_MCHECK	Machine check exception
  PF_MIPS_CPU_VCE	Virtual coherence conflict
  PF_MIPS_CPU_WATCH	Watchpoint registers
  PF_MIPS_FPU	FPU support
  PF_MIPS_MIPS16	MIPS16 instruction set
  PF_MIPS_MIPS32	MIPS32 instruction set
  PF_MIPS_MIPS64	MIPS64 instruction set
  PF_MIPS_MIPSII	MIPSII instruction set
  PF_MIPS_MIPSIII	MIPSIII instruction set
  PF_MIPS_MIPSIV	MIPSIV instruction set
  PF_MIPS_PERF_COUNTER	Performance counter
  PF_MIPS_SMART_ASE	MIPS smart card architecture specific extension

  The following table shows the flags for SHx processor features.

  Flag	Description
  PF_SHX_DSP	Digital signal processor (DSP)
  PF_SHX_FPU	Floating-point unit
  PF_SHX_SH3	SH3 instruction set
  PF_SHX_SH4	SH4 instruction set
  PF_SHX_SH5	SH5 instruction set

  The following list shows the flags for x86 processor features:

  • PF_3DNOW_INSTRUCTIONS_AVAILABLE
  • PF_ALPHA_BYTE_INSTRUCTIONS
  • PF_COMPARE_EXCHANGE_DOUBLE
  • PF_FLOATING_POINT_EMULATED
  • PF_FLOATING_POINT_PRECISION_ERRATA
  • PF_MMX_INSTRUCTIONS_AVAILABLE
  • PF_PAE_ENABLED
  • PF_PPC_MOVEMEM_64BIT_OK
  • PF_RDTSC_INSTRUCTION_AVAILABLE
  • PF_XMMI_INSTRUCTIONS_AVAILABLE
  • PF_XMMI64_INSTRUCTIONS_AVAILABLE

  Note

  All other PF_XXX flags return FALSE.

Return Value

Nonzero indicates that the processor feature is supported. FALSE indicates that the processor feature is not supported.

Remarks

The PF_XXX flags in dwProcessorFeature are filtered based on the CPU type. Only the PF_XXX flags corresponding to the CPU being compiled are present.

Requirements

See Also

Reference

System Management Functions

Other Resources

pOEMIsProcessorFeaturePresent