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_rzu_ob

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This function logically shifts the values in the accumulator to the right by the values in vector vs, rounded to the nearest value with exactly halfway result rounded toward zero, and clamped to an unsigned subset of the range of vd.

double _rzu_ob(
  double Arg1, 
  int Arg2
);

Parameters

  • Arg1
    The contents of vector vs or the first operand to the Vector Scale, Round and Clamp accumulator instruction.
  • Arg2
    The value of the select field, which selects the values of vt[i] used for each i. The following table shows the possible values for the select field.
    Select field Description
    0000 Vector-scalar operation where each element of vs is operated against element vt[0].
    0001 Vector-scalar operation where each element of vs is operated against element vt[1].
    0010 Vector-scalar operation where each element of vs is operated against element vt[2].
    0011 Vector-scalar operation where each element of vs is operated against element vt[3].
    0100 Vector-scalar operation where each element of vs is operated against element vt[4].
    0101 Vector-scalar operation where each element of vs is operated against element vt[5].
    0110 Vector-scalar operation where each element of vs is operated against element vt[6].
    0111 Vector-scalar operation where each element of vs is operated against element vt[7].
    1011 Vector-vector operation, where each element of vt is operated against the corresponding elements of vs.

Return Values

The vector result of the round, scale, and clamp operation.

Remarks

The MIPS compiler translates this intrinsic function into the RZU.OB assembly instruction.

The accumulator is in the OB format. The sel field selects the values of vt[] used for each i. The shift amount must be an immediate and the value must be 0, 8, or 16. The clamping range is zero to 255.

No data-dependent exceptions are possible. The operands must be values in the OB format. If they are not, the results are undefined and the values of the operand vectors become undefined. The result of this instruction is undefined if the processor is executing in 16 FP register mode.

Requirements

OS Versions: Windows CE .NET 4.0 and later.
Header: Mipsintr.h.

See Also

Common Intrinsic Functions | Intrinsic Functions for MIPS Microprocessors

 Last updated on Thursday, April 08, 2004

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