Renesas SH-4 Prolog and Epilog (Windows Embedded CE 6.0)
1/5/2010
Renesas SuperH SH-4 prolog and epilog code segments are required to implement Structured Exception Handling (SEH) on Renesas microprocessors. For more information, see SEH in RISC Environments.
The prolog contains the code that sets up the stack frame for a routine. The epilog contains the code that removes the routine's frame and then returns to the calling function.
In This Section
- SH-4 Prolog
Describes the requirements for an SH-4 prolog sequence.
- SH-4 Epilog
Describes the requirements for an SH-4 epilog sequence.
- SH-4 Prolog and Epilog Examples
Provides examples of paired prolog and epilog sequences.
- SH-4 Assembler Macros
Describes the macros defined for SH-4 microprocessors.